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High-Speed Signals on a Flex Circuit

A flex tail is not a thin rigid board. The dielectric, the cover and the fold change the electrical picture enough to re-model it.

Hitech Circuits Engineering Desk

Shenzhen, China · PCB fabrication and assembly

2 min read

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Technical review: Process figures checked against our published capability sheet. View capability sheet

Using Flex PCB in High-Speed Applications

The dielectric is not FR-4

A flex circuit is built on a polyimide film with an adhesive system and a coverlay, not on glass-reinforced epoxy under a printed mask. Three consequences follow for high-speed design.

No glass weave. FR-4 has woven glass bundles with different dielectric constant from the resin between them, which causes skew and impedance ripple on differential pairs. Polyimide film is homogeneous, so that particular problem disappears — one of the few places where flex is easier than rigid.

Thin dielectric, narrow traces. A 25 µm core puts the reference plane very close to the signal, so a 50 Ω trace is narrow — often near the 0.002″ process limit. The designer has less freedom to trade width for impedance, and the tolerance on film and adhesive thickness matters more than on a thick rigid core.

Coverlay instead of mask. The cover is a laminated film with adhesive, so the dielectric above the trace is thicker and less uniform than a printed mask. It is part of the impedance model, and it is also why coverlay openings are specified generously.

Loss has to come from the real build

Two loss mechanisms dominate at multi-gigabit rates: dielectric dissipation and copper roughness. Polyimide and the adhesive layers dissipate more than the PTFE and hydrocarbon laminates used for high-frequency rigid boards, and flex foils are not always the low-profile type that keeps high-speed loss down.

That does not rule flex out for high-speed work — it rules out copying a rigid stack-up into a flex tail and expecting the same numbers. Where loss matters, the build is modelled with the actual film, adhesive and copper, and the result is compared against the channel budget including connectors and cable.

The fold is a discontinuity

A bend changes the spacing between the signal and its reference, and it can change the local dielectric geometry. In a static bend that is a fixed impedance step; in a dynamic bend it is a step that moves.

Practical rules follow:

  • Keep high-speed routes out of the bend region where the layout allows, and route them across the bend at right angles when it does not.
  • Keep a reference plane continuous under the signal, including through the bend, even if that means a thin copper pour rather than a full plane.
  • Treat the connector at each end as part of the channel; the flex itself is often the least lossy element in the path.

When to move to rigid-flex

If the high-speed section needs several layers, controlled impedance on more than one, and a stiffened connector area, a rigid-flex build keeps the dense routing on FR-4 and uses polyimide only where the geometry has to move. Impedance is held to ±10 % on both, and the capability page lists the thickness and copper ranges.

Technical Specifications

Impedance tolerance
±10 %
Base thickness
12.5–50 µm
Copper thickness
0.5–2 oz
Coverlay thickness
12–25 µm
Minimum line / space
0.002″ (3 mil)

Frequently Asked Questions

  • Can a flex circuit be impedance controlled?

    Yes, to ±10 % where the design requires it. The complication is that the dielectric is thin, so a 50 Ω line becomes narrow — close to the 0.002″ line width limit — and the adhesive and coverlay thicknesses become part of the impedance calculation. The stack-up is designed for the target rather than checked after routing.

  • Why is loss different on flex than on FR-4?

    The dielectric is polyimide and adhesive rather than glass-reinforced epoxy, and there is no woven glass to create a periodic variation in dielectric constant. Polyimide and the adhesive layers dissipate more than the PTFE and hydrocarbon laminates used for high-frequency rigid boards, and the coverlay adds a second dielectric boundary. Loss therefore has to be modelled from the actual build, not copied from a rigid stack-up.

  • What happens electrically at a fold?

    The geometry changes: the conductor bends, the spacing to the reference plane changes, and the local impedance moves away from the target. A fold inside a high-speed route is a discontinuity, so the route either avoids the bend region or the transition is modelled and its effect accepted. Connector transitions usually matter more.

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